On Dynamic Simultaneous Switching Noise Analysis with Advanced Standard Library Information

• Main Authors: Ju-chi Hsu, 許茹棋
• Other Authors: Chien-nan Liu
• Format: Others
• Language: zh-TW
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/75210793134092832683

碩士 === 國立中央大學 === 電機工程研究所 === 99 === 　　As the integrated circuit process technology goes into the nanometer era, power integrity becomes an important issue. Simultaneous switching noise is a major component of the power supply noise. Due to the increased clock rate and current density, this noise would result in more serious voltage fluctuations in power network. Traditionally, the simultaneous switching noise can be analyzed by the transistor-level simulation only, which takes too much simulation time for complex circuits. Thus, this thesis proposes a method of estimating the dynamic simultaneous switching noise at gate level. In order to consider the power supply noise effects, the ideal supply current waveform obtained from the standard cell library is modified by a RLC low-pass filter transformation. With the modified current waveform, the simultaneous switching noise can be derived easily by using the basic formula of inductor. Because all the required input data of this method can be obtained at gate level, the estimation is very quick. The experimental results show that the accuracy of the estimation results can be significantly improved by the proposed approach. It can help users to do the preliminary noise estimation at early design stage.