The Study on Transmission Line Transformer and Power-Combining Techniques for Fully Integrated Power Amplifier Design

• Main Authors: Ting-Yao Huang, 黃亭堯
• Other Authors: Hwann-Kaeo Chiou
• Format: Others
• Language: zh-TW
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/52842927553299575085

碩士 === 國立中央大學 === 電機工程研究所 === 99 === The study of this thesis is to design different power combiners for power amplifier application, which can be used to achieve the high transmission efficiency and impedance transformation. The content of this thesis is divided into two parts. They are transformer and transmission line transformer (TLT) for power combining respectively. In the first part, we have designed two power amplifiers with power combining transformers. They are “A Parallel Power Combining Transformer for CMOS Power Amplifier” and “Differential Class E Power Amplifier Using Power Combining Transformer” respectively. The amplifiers were designed and implemented in tsmcTM 0.18 μm CMOS process for 2.4 GHz application. The first design is used of two class AB differential pairs, which were combined the output power from four groups of amplifiers by parallel power combining transformer. And the second design is used a class E differential pair, which were combined the output power from the two class E amplifiers by the power combining transformer. The second part of the thesis is related to the use of TLT for power combining in power amplifier design. A K-band class AB differential power amplifier with TLT was implemented in WINTM 0.15 μm pHEMT process. The measured results of these designs are summarized as follow. The CMOS power amplifier with parallel power combining transformer achieves a power gain of 19.8 dB, and input and output return losses are 10.2 dB and 5.3 dB respectively. The output 1-dB gain compression point (P1dB) is 20.9 dBm, and the saturated output III power is 26.7 dBm with the maximum power added efficiency of 24.8%. The chip size is 1.4 × 1.37 mm2. The differential class E power amplifier with power combining transformer achieves apower gain of 12.98 dB. The output 1-dB gain compression point (P1dB) is 23.3 dBm, and the saturated output power is 25.9 dBm, with the maximum power added efficiency of 29.9%. The chip size is 1.33 × 1.11 mm2. The K-band Power Amplifier with TLT power combining network achieves a power gain of 10.2 dB, and input and output return losses are 18.7 dB and 11.48 dB respectively. The output 1-dB gain compression point (P1dB) is 22 dBm with the power added efficiency of 23.4%. The chip size is 1.5 × 1 mm2.