| Summary: | 碩士 === 國立中央大學 === 電機工程研究所 === 99 === In this thesis, we proposed a MIMO detector which can support multiple antenna types (6×6, 5×5, 4×4, 3×3, and 2×2), various modulation schemes (64-QAM, 16-QAM, QPSK, and BPSK) and K-value (K=10). From the algorithm aspects, we deigned a modified K-best algorithm (MKB) can reduce the number of sorting layer from 2Nt to Nt, compared with the conventional K-best algorithm. The MKB also include the Code-Book Enumeration to reduce number of visted nodes from K×√(M ) to K×e.To further enhance sorting performance, we design the Paralled-Slice Merge algorithm(PSMA) and Parallel Bubble-Slice sort(PBSS). In terms of hardware implementation, the MKB and sorting circuit are designed as elementary building blocks. With these building blocks, the proposed MIMO detector can flexibly achieve the configurable architecture. In order to simplify the multiplier complexity, we propose a novel shift-multiplier (SM) to replace the conventional multiplier. Finally, the proposed configurable MIMO detector is verified by the SIMIS VeriEnterprise Xilinx FPGA development board.
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