VLSI architecture design for Convolutive Blind Source Separation

• Main Authors: Shao-Chieh Huang, 黃紹傑
• Other Authors: Jia-Ching Wang
• Format: Others
• Language: en_US
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/45876328535836644899

碩士 === 國立中央大學 === 資訊工程研究所 === 99 === Blind source separation (BSS) of independent sources from their convolutive mixtures is a problem in many real world applications. Therefore, we hope we can design an effective and scalable VLSI architecture for BSS. Considering the algorithm, the BSS architecture proposed by Torkkola is utilized and its learning rule is similar to least mean squares (LMS). Reducing the critical path will increase clock rate and throughput of hardware, so we apply delayed LMS (DLMS) to BSS. We proposed two VLSI architectures for DLMS. The proposed-I architecture improves the adaptation delays. In most of the cases, we maintain 3 adaptation delays and maintain the critical path as one adder and one multiplication. The proposed-II architecture based on sharing multiplication improves adaptation delays and critical path. In most of the cases, we only need 6 adaptation delays. Because critical path only passes precomputer bank, the critical path is less than 1Tm. Besides, we reduce the effect of delays and filter length in the two propose methods. The proposed VLSI design for BSS is based on the above two presented DLMS architecture. Moreover, both feedforward and feedback BSS algorithms are adopted respectively. Because the designed DLMS is modular and its critical path is maintained, the proposed VLSI architecture for convolutive blind source separation is scalable and effective.