| Summary: | 碩士 === 國立中央大學 === 物理研究所 === 99 === Current microelectronics chip can be composed of thousands of microarrays
that contain up to millions of physically identical transistors layout
in vastly different micro-environment. Systematic threshold voltage
(Vth) variation due to the detailed difference in the microenvironment has
been shown in many electrical assessments.
In this work, we have designed an experimental platform for investigating
the dependence of dimensionality in two dimensional boron diffusion
lengths (Ldi f f ). We systematically vary the ion implantation window
length scales in both length (l) and width (w) directions using photolithography
process. The two dimensional Ldi f f are measured with
plane view scanning capacitance microscopy (SCM). The Ldi f f in width
shrunk patterns exhibit stronger diffusion, especially in ion implantation
windows with larger l, namely, boron transient diffusion roll-off.
This observation suggest there is effectively more interstitial (Is) sources
within the proximity of B-Is interaction range during annealing and lead
to more significant transient enhanced diffusion (TED) at larger confinements.
The normalized Ldi f f for ion implantation boundaries length
scales ranging from 0.3 micron to 5 micron shows five folds difference.
The normalized curves for both categories of patterns overlap, indicating
similar physical mechanism in play for the two cases.
We have developed a non-linear logistics model. We can successfully
fit the experimental data with the above model by considering only the
difference in dimensionality. In particular, we found a 3/5 ratio for the
linear growth coefficients of effective Is supersaturation with respect to
the ion implantation boundary dimensions between the two patterns. We
relate this coefficient ratio to number of interstitial injection boundaries
available within B-Is interaction range.
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