Positive Bias Temperature Instability(PBTI) Analysis and Simulation in 22 nm High-k Metal Gate nMOSFETs

碩士 === 國立交通大學 === 電子研究所 === 99 === In this dissertation a new method to predict the post-stress threshold voltage distribution is introduced. We proposed the fast transient measurement, which minimizes the switching delay between stress and measurement. Consequently, a staircase-like post-positive b...

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Main Authors:	Wang, Chih-Yu, 王志宇
Other Authors:	Wang, Ta-Hui
Format:	Others
Language:	en_US
Published:	2011
Online Access:	http://ndltd.ncl.edu.tw/handle/64063337299664947310

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spelling	ndltd-TW-099NCTU54281652015-10-13T20:37:26Z http://ndltd.ncl.edu.tw/handle/64063337299664947310 Positive Bias Temperature Instability(PBTI) Analysis and Simulation in 22 nm High-k Metal Gate nMOSFETs 22奈米高介電係數金屬閘極電晶體之正向偏壓溫度不穩定性分析及模擬 Wang, Chih-Yu 王志宇碩士國立交通大學電子研究所 99 In this dissertation a new method to predict the post-stress threshold voltage distribution is introduced. We proposed the fast transient measurement, which minimizes the switching delay between stress and measurement. Consequently, a staircase-like post-positive bias temperature (PBT) current instability caused by single electron trapping is investigated. To analyze the characteristic of PBTI stress induced threshold voltage degradation. First, we extract the probability distribution of the single electron trapping induced drain current degradation. Second, the time model is developed in stress and recovery phase. According to the characterization of the single charge phenomenon, we proposed a Monte Carlo simulation to simulate the post-stress threshold voltage distribution. Wang, Ta-Hui 汪大暉 2011 學位論文 ; thesis 55 en_US
collection	NDLTD
language	en_US
format	Others
sources	NDLTD
description	碩士 === 國立交通大學 === 電子研究所 === 99 === In this dissertation a new method to predict the post-stress threshold voltage distribution is introduced. We proposed the fast transient measurement, which minimizes the switching delay between stress and measurement. Consequently, a staircase-like post-positive bias temperature (PBT) current instability caused by single electron trapping is investigated. To analyze the characteristic of PBTI stress induced threshold voltage degradation. First, we extract the probability distribution of the single electron trapping induced drain current degradation. Second, the time model is developed in stress and recovery phase. According to the characterization of the single charge phenomenon, we proposed a Monte Carlo simulation to simulate the post-stress threshold voltage distribution.
author2	Wang, Ta-Hui
author_facet	Wang, Ta-Hui Wang, Chih-Yu 王志宇
author	Wang, Chih-Yu 王志宇
spellingShingle	Wang, Chih-Yu 王志宇 Positive Bias Temperature Instability(PBTI) Analysis and Simulation in 22 nm High-k Metal Gate nMOSFETs
author_sort	Wang, Chih-Yu
title	Positive Bias Temperature Instability(PBTI) Analysis and Simulation in 22 nm High-k Metal Gate nMOSFETs
title_short	Positive Bias Temperature Instability(PBTI) Analysis and Simulation in 22 nm High-k Metal Gate nMOSFETs
title_full	Positive Bias Temperature Instability(PBTI) Analysis and Simulation in 22 nm High-k Metal Gate nMOSFETs
title_fullStr	Positive Bias Temperature Instability(PBTI) Analysis and Simulation in 22 nm High-k Metal Gate nMOSFETs
title_full_unstemmed	Positive Bias Temperature Instability(PBTI) Analysis and Simulation in 22 nm High-k Metal Gate nMOSFETs
title_sort	positive bias temperature instability(pbti) analysis and simulation in 22 nm high-k metal gate nmosfets
publishDate	2011
url	http://ndltd.ncl.edu.tw/handle/64063337299664947310
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Positive Bias Temperature Instability(PBTI) Analysis and Simulation in 22 nm High-k Metal Gate nMOSFETs

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