Positive Bias Temperature Instability(PBTI) Analysis and Simulation in 22 nm High-k Metal Gate nMOSFETs
碩士 === 國立交通大學 === 電子研究所 === 99 === In this dissertation a new method to predict the post-stress threshold voltage distribution is introduced. We proposed the fast transient measurement, which minimizes the switching delay between stress and measurement. Consequently, a staircase-like post-positive b...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2011
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/64063337299664947310 |
| Summary: | 碩士 === 國立交通大學 === 電子研究所 === 99 === In this dissertation a new method to predict the post-stress threshold voltage distribution is introduced. We proposed the fast transient measurement, which minimizes the switching delay between stress and measurement. Consequently, a staircase-like post-positive bias temperature (PBT) current instability caused by single electron trapping is investigated.
To analyze the characteristic of PBTI stress induced threshold voltage degradation. First, we extract the probability distribution of the single electron trapping induced drain current degradation. Second, the time model is developed in stress and recovery phase. According to the characterization of the single charge phenomenon, we proposed a Monte Carlo simulation to simulate the post-stress threshold voltage distribution.
|
|---|