Independently-Controlled-Gate FinFET Schmitt Trigger Sub-threshold SRAMs
碩士 === 國立交通大學 === 電子研究所 === 99 === In this paper, we propose three novel Independently-controlled-Gate Schmitt Trigger (IG_ST) FinFET SRAM cells for sub-threshold operation. The proposed IG_ST 8T SRAM cells utilize split-gate FinFET devices with the front-gate devices serving as the stacking devices...
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ndltd-TW-099NCTU54280712016-04-08T04:22:00Z http://ndltd.ncl.edu.tw/handle/90163774215253788579 Independently-Controlled-Gate FinFET Schmitt Trigger Sub-threshold SRAMs 史密特觸發器為基礎操作在次臨界區以獨立閘極控制場效鰭狀電晶體之靜態隨機存取記憶體 Hsieh, Chien-Yu 謝建宇 碩士 國立交通大學 電子研究所 99 In this paper, we propose three novel Independently-controlled-Gate Schmitt Trigger (IG_ST) FinFET SRAM cells for sub-threshold operation. The proposed IG_ST 8T SRAM cells utilize split-gate FinFET devices with the front-gate devices serving as the stacking devices, and the back-gate devices serving as the intermediate node conditioning devices to provide built-in feedback mechanism for Schmitt Trigger action, thus reducing the cell transistor count/area and achieving improved SNM and better tolerance to process variation and local random variation (LER). 3D mixed-mode simulations are used to evaluate the SNM, and Standby leakage of proposed cells, and results are compared with the standard 6T cells and previously reported 10T Schmitt Trigger sub-threshold SRAM cells (ST1 and ST2). Compared with the conventional tied-gate 6T cell, the proposed IG_ST SRAM cells demonstrate 1.81X and 2.11X higher nominal RSNM at VCS=0.4V and 0.15V, respectively. The cell layouts and areas are assessed based on scaled ground rules from 32 nm node, and the density advantage over previously reported 10T Schmitt Trigger sub-threshold SRAM cells are illustrated. The cell AC performance (Read access time, Write time, and Read access time versus the number of cells per bit-line) and temperature dependence are evaluated, and shown to be adequate for the intended sub-threshold applications. Stability is a critical concern in sub-threshold region, so we consider Gate –, and Fin – Line Edge Roughness, and Work Function Variability using 3D mixed-mode Monte Carlo simulations to investigate its stability. Moreover, process variations (Leff, EOT, Wfin(Tsi,), and Hfin) are performed for systematic variation concern. Our results indicate that even at the worst corner (FNSP), two of the proposed cells can provide sufficient margin of μ/σ ratio. Chuang, Ching-Te 莊景德 2010 學位論文 ; thesis 82 en_US |
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碩士 === 國立交通大學 === 電子研究所 === 99 === In this paper, we propose three novel Independently-controlled-Gate Schmitt Trigger (IG_ST) FinFET SRAM cells for sub-threshold operation. The proposed IG_ST 8T SRAM cells utilize split-gate FinFET devices with the front-gate devices serving as the stacking devices, and the back-gate devices serving as the intermediate node conditioning devices to provide built-in feedback mechanism for Schmitt Trigger action, thus reducing the cell transistor count/area and achieving improved SNM and better tolerance to process variation and local random variation (LER).
3D mixed-mode simulations are used to evaluate the SNM, and Standby leakage of proposed cells, and results are compared with the standard 6T cells and previously reported 10T Schmitt Trigger sub-threshold SRAM cells (ST1 and ST2). Compared with the conventional tied-gate 6T cell, the proposed IG_ST SRAM cells demonstrate 1.81X and 2.11X higher nominal RSNM at VCS=0.4V and 0.15V, respectively. The cell layouts and areas are assessed based on scaled ground rules from 32 nm node, and the density advantage over previously reported 10T Schmitt Trigger sub-threshold SRAM cells are illustrated. The cell AC performance (Read access time, Write time, and Read access time versus the number of cells per bit-line) and temperature dependence are evaluated, and shown to be adequate for the intended sub-threshold applications.
Stability is a critical concern in sub-threshold region, so we consider Gate –, and Fin – Line Edge Roughness, and Work Function Variability using 3D mixed-mode Monte Carlo simulations to investigate its stability. Moreover, process variations (Leff, EOT, Wfin(Tsi,), and Hfin) are performed for systematic variation concern. Our results indicate that even at the worst corner (FNSP), two of the proposed cells can provide sufficient margin of μ/σ ratio.
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author2 |
Chuang, Ching-Te |
author_facet |
Chuang, Ching-Te Hsieh, Chien-Yu 謝建宇 |
author |
Hsieh, Chien-Yu 謝建宇 |
spellingShingle |
Hsieh, Chien-Yu 謝建宇 Independently-Controlled-Gate FinFET Schmitt Trigger Sub-threshold SRAMs |
author_sort |
Hsieh, Chien-Yu |
title |
Independently-Controlled-Gate FinFET Schmitt Trigger Sub-threshold SRAMs |
title_short |
Independently-Controlled-Gate FinFET Schmitt Trigger Sub-threshold SRAMs |
title_full |
Independently-Controlled-Gate FinFET Schmitt Trigger Sub-threshold SRAMs |
title_fullStr |
Independently-Controlled-Gate FinFET Schmitt Trigger Sub-threshold SRAMs |
title_full_unstemmed |
Independently-Controlled-Gate FinFET Schmitt Trigger Sub-threshold SRAMs |
title_sort |
independently-controlled-gate finfet schmitt trigger sub-threshold srams |
publishDate |
2010 |
url |
http://ndltd.ncl.edu.tw/handle/90163774215253788579 |
work_keys_str_mv |
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