| Summary: | 碩士 === 國立交通大學 === 電子研究所 === 99 === In this thesis, we have successfully developed and fabricated two kinds of novel device structures, including suspended-nanowire (NW)-channel thin film transistors (TFTs) and vertical metal-oxide-semiconductor field-effect transistors (VMOS). The suspended NW channels in suspended-NW-channel TFTs and the sidewall spacer gate electrode in VMOS are formed by a simple and low-cost reactive ion etch (RIE) technique. Especially, in VMOS, further cost down could be achieved as only two main photolithographic reticles are needed through the process.
The suspended-NW-channel TFTs with ultra-low subthreshold swing (S.S.) (35 mV/dec.) and considerable hysteresis window (3.7 V) are demonstrated. The limited pull-in drain current (ID), the transient-like behavior in ID, the asymmetric S.S., and the hysteresis window opening characteristics are also observed. Besides, the specific trends in hysteresis window, Vpi, Vpo, S.S.F and S.S.R with the change of geometric structure dimensions and VG sweeping rate are found and analyzed. Finally, based on all of the above observations, a conceptual model illustrating the interaction between the electrostatic force, the elastic recovery force and the surface adhesion forces during device operation is proposed.
On the other hand, the VMOS devices exhibit a good on-off ratio of 106 and acceptable anti-punch through ability. In addition, an interesting two-step turn-on characteristic is also observed and explained by the convex corner effect.
|
|---|
