Design of LC-tank Oscillators to Comprise Phase Noise and Power Consumption and Dividers with Wide Locking Range

• Main Authors: Guan-Lin Fu, 傅冠霖
• Other Authors: Heng-Ming Hsu
• Format: Others
• Language: zh-TW
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/17066855824530492811

碩士 === 國立中興大學 === 電機工程學系所 === 99 === This thesis includes four topics, the first topic focus on the optimization of LC-tank in voltage control oscillator , we discuss the selection of inductance and capacitance for high and low frequency application. The approach uses both parameters such as effective conductance and effective resistance,to compromise the phase noise and power consumption. Measurement show tuning range 8.3GHz to 9.63GHz , phase noise is -115dBc/Hz at 1MHz offset, power consumption is 14.76mW. The second topic implements two voltage control oscillators ,the first one uses amplitude detector to reduce the power consumption, operated at 24GHz, phase noise -105dBc/Hz at 1MHz offset, using TSMC 0.18um process to fabricate the chip. The second one uses amplifier to cancel the loss of LC-tank and use the series connection of inductor and varactor to increase input impedance and isolate the parasitic capacitances of varactor and transistor, decrease the power consumption and operation in more higher frequency, also uses transformer to reduce chip area. The third topic describes 2:1 injection-locked frequency dividers, the proposed topology used parallel resistance to reduce quality factor of LC-tank, uses current bleeding approach to decrease power consumption. However, the topology disadvantage reduces the locking range. The improvement circuit adopts double injection-locked approach, increases locking range and decrease power consumption. The chip implementation used TSMC 0.18 um technology, the measured input frequency is 11.9 GHz to 18 GHz, the locking range is 40.8%,power consumption is 4.4 mW. The last topic describes 3:1 injection-locked frequency dividers ,the first one adopts a mixer and a 2:1 injection-locked frequency dividers to decrease power consumption and connet and inductor to cancel parasitic capacitances to increase locking range. The measured operation frequency is from 9.2 GHz to 12.3 GHz, the operation range is 29%,power consumption is 10.8mW.The second circuit to solve the low output power an amplifier is used enlarge output signal and from enhance output power. The measure frequency is from 18.4 GHz to 21.9 GHz, the locking range is 17%,power consumption is 19mW.