Design of the Converter for Digital Video Modulator
碩士 === 國立高雄應用科技大學 === 電子工程系 === 99 === This thesis develops the digital video broadcasting (DVB) system up-converter circuits, it mainly uses offset phase-locked loop (PLL) structure to reduce the PLL phase effectively noise to provide the good radio frequency modulated signals in the DVB system. Th...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2011
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/97488130463705653841 |
| Summary: | 碩士 === 國立高雄應用科技大學 === 電子工程系 === 99 === This thesis develops the digital video broadcasting (DVB) system up-converter circuits, it mainly uses offset phase-locked loop (PLL) structure to reduce the PLL phase effectively noise to provide the good radio frequency modulated signals in the DVB system. This methodology combines dual-conversion and dual-loop PLL structures. It enables up-converter locked-loop system which has the high-pass-filter characteristics to inhibit the noise of RF modulation output signals. When the system signal output at 600 MHz and 999 MHz, the phase noise 100 Hz~10 KHz would be improved with 10 dB (600 MHz) and 5~10 dB (999 MHz) respectively.
|
|---|