The study of processing bottleneck improvement by conveyor speed in 450 mm semiconductor factory

• Main Authors: Yi-Chen Lee, 李易真
• Other Authors: Chia-Nan Wang
• Format: Others
• Language: en_US
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/92233301558479263214

碩士 === 國立高雄應用科技大學 === 工業工程與管理系 === 99 === Semiconductor industry develops rapidly in recent years. According to Moore’s Law, semiconductor wafer manufacturers are constantly searching opportunities to improve productivity while reducing costs and cycle times within wafer fabs. The construction of 450 mm wafer fab has been undergoing, and the conveyor will be a potential solution to realize transportation automation. The lot moves along the conveyor rails, and it will continuously moves which is followed by the same direction. If the transport on downstream is blocked, the goods on front conveyor will also be blocked. The purpose of this paper is to put focus on the bottleneck of conveyor loops and provide effectively transport services for lots which will change the speed of bottleneck loops under 450 mm semiconductor fab. The objective of this approach is to minimize the transport delay of lots and to convey our idea for lots transport services. The results demonstrate that controlling the speed of bottleneck loops can expedite the movement of lots and reduce lot transport time without more resources that need to be inputted.