The Application and Verification of SFG Modeling Technique for Multi-Level Cascaded Inverters
碩士 === 朝陽科技大學 === 資訊工程系碩士班 === 99 === In this thesis, the switching flow-graph (SFG) modeling technique is used to build the large-signal model of a multi-level cascaded inverter. Based on the concept of virtual switch and virtual switching function proposed in SFG modeling technique, the large-sign...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/23831952271591050668 |
| Summary: | 碩士 === 朝陽科技大學 === 資訊工程系碩士班 === 99 === In this thesis, the switching flow-graph (SFG) modeling technique is used to build the large-signal model of a multi-level cascaded inverter. Based on the concept of virtual switch and virtual switching function proposed in SFG modeling technique, the large-signal SFG model of multi-level cascaded multi-level inverters can be derived easily and without complex mathematic works. The SFG model can also be implemented in MATLAB/SIMULINK directly and only 1/9 execution time is needed as compared with PSPICE model. The experimental examples demonstrate that the simulation results by using SFG model are closely agreed with the experimental results.
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