4-Bit flash analog-to-digital converter

• Main Authors: Ming-Jhou Sie, 謝明周
• Other Authors: 呂輝宗
• Format: Others
• Language: zh-TW
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/60460902388790029068

碩士 === 建國科技大學 === 電子工程系暨研究所 === 99 === We use TSMC0.35μm2P 4M technology to design a positive feedback 3-bit 20MHz flash analog-to-digital converter and a 4-bit 1GHz flash analog-to-digital converter with hysteresis comparator. Reference potential was generated by resistor array, then compared with the input potential, and the resulting thermometer code pass through the pre-encoding circuit (1-out-of-N) and post-encoding circuit (Binary Code) after output. The 4-bit flash analog-to-digital-converter features working voltage range from 0.9 to 2.2 V, sampling rate of 1GHz, the power consumption is 5.158 mW and the chip layout area is 1.445×1.393mm . For 3-bit flash analog-to-digital converter, the working voltage ranges from 0 to 3.3 V, sampling rate of 20MHz, the power consumption is 2.2228mW and the chip layout area is 1.181 × 1.326 mm .