Thermal Analyses and Measurements of LED Array and Module

• Main Authors: Meng Ru Tsai, 蔡孟儒
• Other Authors: M. Y. Tsai
• Format: Others
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/55067829455804325522

碩士 === 長庚大學 === 機械工程學系 === 99 === The purpose of this study is to investigate the thermal behaviors of LED array and module. The LED array contains nine LED chips, both vertical LED (VLED) and lateral LED (LLED) were used in this study. First, the junction temperature (Tj) of lighting one chip and nine chips were measured by “LED junction temperature tester,” the surface temperature (Ts) of LED array could be obtained by thermocouple. Second, Simulation software ANSYS and CFdesign were used to predict the thermal fields of LED array and module. Then the parametric studies were implemented by effective simulation models to find out the key factors to Tj. Finally, the heat sink was optimized by using Taguchi method. The results of experiments and simulations indicate that the trends on Tj and thermal resistance (Rth) are similar and the values are close under different input powers. So the simulation model are validated. The results of parametric studies by validated models show that the higher power efficiency of VLED cause the lower Tj than LLED instead of the higher thermal conductivity of copper substrate. As aspect of geometry, the additional thermal vias below chip can reduce Tj about 4℃at most, but the effect is not obvious when more than 4 vias. The suitable fin pitch can reduce Tj effectively under natural convection. And the optimized heat sink parameters are found by Taguchi Method, which fin pitch 8 mm, fin height 60 mm, fin width 1 mm and base thickness 5 mm.