Soft error tolerant latch design
碩士 === 長庚大學 === 電機工程學系 === 99 === With the progress of process technology, transistor density is increased and supply voltage is scaled down, which leads to higher soft error rate. Therefore, reliability issue becomes the main design challenge in IC design. Because latch circuits are more sensitive...
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| Format: | Others |
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2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/65134675597664163016 |