| Summary: | 碩士 === 國立中正大學 === 電機工程研究所 === 99 === In this thesis, an analog front-end circuit with auto-tuning 60-Hz notch filter for ECG detection system was implemented. It provided not only the ECG detection but also the power-line interference elimination. Moreover, the novel method called two-frequency magnitude tracking and comparison is employed and the tuning circuit is embedded in the sensing channel. In order to achieve the goal of low-voltage and low-power for implanted biomedical electronics, this system is operated in weak-inversion at 1-V supply voltage.
The automatic tuning analog front-end (ATAFE) contains a preamplifier, a low-pass filter, an input switch, a notch filter, a post-amplifier, a successive-approximation analog-to-digital converter (SARADC), a digital calibration system, a digital-to-analog converter (DAC) with modification circuit, and an ATAFE control circuit. The above circuits are used for amplification, filtered, sensing, digitalizing interception ECG, and auto-tuning the center frequency of notch filter as PVT variation and aging.In this thesis, TSMC 0.35μm Mixed Signal 2P4M CMOS Process was used for the chip and its area was 4.76mm2. According to the simulation results under the 1-V supply voltage, the total power consumption is 1.6μW. Besides, the center frequency of notch filter for power-line interference elimination is tuned done, and the accuracy is up to 99.217%.
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