An Inter-frame/Inter-view Cache Architecture Design For Multi-view Video Decoder
碩士 === 國立中正大學 === 資訊工程研究所 === 100 === This thesis presents a low-bandwidth two-level inter-frame/inter-view cache architecture for a view scalable multi-view video decoder, which adopts two decoder cores to decode multi-view videos in parallel. The first level inter-frame cache is developed for the...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/37304340502220091730 |