CMOS FET Modeling and verification
碩士 === 元智大學 === 通訊工程學系 === 98 === This thesis presents the device characterization and modeling for CMOS FETs in TSMC 0.18 ?m technology. The first part about the device characterization shows linear parameter extraction including the extrinsic parasitic resistors and capacitors and the transconduc...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/34388410091740516927 |