| Summary: | 碩士 === 元智大學 === 電機工程學系 === 98 === The analysis and design of an efficient RF-to-DC rectifier for UHF power harvester at 915MHz ISM band is presented. Systematic design considerations for power sensitivity, conversion efficiency, and load effects have been taken into account, in particular, voltage boosting by the impedance matching network is studied and employed. To clearly define the system, RF power model is used. The system transfer function and the energy loss of rectifier are discussed from the point of view of RF power model. Furthermore, native transistors are utilized in the circuit design, whose ultra low threshold voltage improves the power sensitivity substantially. A 7-stage RF-to-DC rectifier was designed and fabricated in TSMC 0.18um MM/RF CMOS process. Experimental measurement results with one pair of dipole antenna to receive power showed that the proposed circuit had a power sensitivity of -10dBm, while maintaining a DC output voltage of 1.8V and a high conversion efficiency of 53.15%.
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