Design of a crosspoint queued router for a micro-network in SoCs

• Main Authors: Jhih-Sian Li, 李致賢
• Other Authors: Wen-Fong Wang
• Format: Others
• Language: en_US
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/42836010586461298669

碩士 === 雲林科技大學 === 資訊工程研究所 === 98 === Due to the advancement of process technology for integrated circuits, more processes can be integrated into a System on Chip (SoC). It causes the challenge of communication aspect in a SoC. Therefore, the concept of Network on Chip (NoC) was proposed. Most research of NoC employs a kind of Input-Queued (IQ) switch architecture with VOQ (Virtual Output Queue) scheme. In this study, we apply a different switching architecture, Crosspoint Queued (CQ) switch architecture, in NoC to improve transmission throughput and delay between IPs. To increase performance, we use an Old Cell First (OCF) weighted matching algorithm for arbitrating contentions. We also use a simple routing scheme, X-Y routing, to transmit flits from source IP to destination IP. Further, the usage of the X-Y routing scheme can reduce the amount of buffer memory in the CQ router. In the implementation design, we integrate the OCF and X-Y routing algorithms into an arbiter of the CQ router. Simulation results show that, applying the CQ switch architecture in NoC has better performance than traditional IQ-VOQ switch architecture in NoC.