Hardware/Software Co-design for Particle Filter and Its Applications in Object Tracking
碩士 === 淡江大學 === 電機工程學系碩士班 === 98 === This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve the execution performance of particle filter (PF) for embedded applications. Based on modular design architecture, a particle updating ac...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/77475234160235425048 |
| Summary: | 碩士 === 淡江大學 === 電機工程學系碩士班 === 98 === This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve the execution performance of particle filter (PF) for embedded applications. Based on modular design architecture, a particle updating accelerator module via hardware implementation for updating particles and a weight evaluation module implemented on a soft-cored processor for calculating weighting for each particle are respectively designed and work closely together to accelerate the execution process. Thanks to a flexible design, the proposed approach can tackle various problems of embedded applications without the need for hardware redesign. Experiment results have demonstrated that the proposed HW/SW co-deign approach to realize particle filters has good computational efficiency to achieve a high-quality solution effectively. Finally, we realize the proposed particle filter with multi-master system architecture design to establish an image processing system for real-time object tracking
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