Adaptive Hardware Context-Switching Approach for Reconfigurable Systems

• Main Authors: Shiau-Jiun Tseng, 曾筱君
• Other Authors: 李宗演
• Format: Others
• Language: zh-TW
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/c3eug9

碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 98 === Nowadays, the ability of dynamic reconfigurable in FPGA architecture has gain its importance while switching on hardware modules. But for recent researches on reconfigurable architecture, most of them aim at one specific version. It’s inconvenient by adding additional hardware circuits to apply on all the versions. Therefore, we propose an adaptive hardware context-switching approach for reconfigurable systems. Accompany with the general bit saving format, it suits all types of Xilinx Virtex-2, Virtex-4 and Virtex-5. Which can reduces the saving number of saved frame address and bit-index. Five example designs, such as up-counter, 32-bit greatest common divisor, data encryption standard, traffic light control and discrete cosine transform are applied to the proposed method. The experimental results shown that our proposed method reduces 56.5% in memory space and 53.26% in instruction space, 16.52% less reading time of frame, 20.5% less hardware reconfiguration time and 22.89% less readback command setting time on saving hardware context.