A Low-power High Read Stability SRAM Cell Design Using Single Bitline
碩士 === 南台科技大學 === 電子工程系 === 98 === In integrated circuit, static random access memory (SRAM) occupies lots of area within a microprocessor and system-on-chip (SoC) design. To design a SRAM cell, four key points must be taken into account, including high stability, low power consumption, low latency...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/46447342806995531430 |