A Boundary-Mode Boost Power Factor Correction Control IC

碩士 === 國立臺灣科技大學 === 電子工程系 === 98 === This thesis aims to realize a boundary-mode control IC for single-switch boost power factor correction (PFC) converters. To reduce the low-frequency harmonics of the source current and achieve high power factor, the duty cycle must be regulated according to the r...

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Main Authors: JUN-TING CHEN, 陳俊廷
Other Authors: Y. K. Lo
Format: Others
Language:zh-TW
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/90884151565225112837
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spelling ndltd-TW-098NTUS54280822016-04-22T04:23:46Z http://ndltd.ncl.edu.tw/handle/90884151565225112837 A Boundary-Mode Boost Power Factor Correction Control IC 邊界模式升壓型功率因數修正控制晶片 JUN-TING CHEN 陳俊廷 碩士 國立臺灣科技大學 電子工程系 98 This thesis aims to realize a boundary-mode control IC for single-switch boost power factor correction (PFC) converters. To reduce the low-frequency harmonics of the source current and achieve high power factor, the duty cycle must be regulated according to the ratio of the instantaneous source voltage and the output voltage for each switching period. In this thesis, a novel PFC control scheme with variable duty cycle is proposed. The operation principles and design considerations are analyzed and discussed. Compared with the conventional DCM PFC control method with fixed switching frequency and constant duty cycle, the proposed variable duty cycle control method has many merits such as low harmonics, high power factor, good voltage regulation, high efficiency, and simple circuit. The TSMC 0.35μm 2P4M 3.3/5V CMOS process is adopted for the implementation of this chip. The simulation results under different environment and process variations are shown to verify the feasibility of the proposed scheme. Y. K. Lo H. J. Chiu 羅有綱 邱煌仁 2010 學位論文 ; thesis 81 zh-TW
collection NDLTD
language zh-TW
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description 碩士 === 國立臺灣科技大學 === 電子工程系 === 98 === This thesis aims to realize a boundary-mode control IC for single-switch boost power factor correction (PFC) converters. To reduce the low-frequency harmonics of the source current and achieve high power factor, the duty cycle must be regulated according to the ratio of the instantaneous source voltage and the output voltage for each switching period. In this thesis, a novel PFC control scheme with variable duty cycle is proposed. The operation principles and design considerations are analyzed and discussed. Compared with the conventional DCM PFC control method with fixed switching frequency and constant duty cycle, the proposed variable duty cycle control method has many merits such as low harmonics, high power factor, good voltage regulation, high efficiency, and simple circuit. The TSMC 0.35μm 2P4M 3.3/5V CMOS process is adopted for the implementation of this chip. The simulation results under different environment and process variations are shown to verify the feasibility of the proposed scheme.
author2 Y. K. Lo
author_facet Y. K. Lo
JUN-TING CHEN
陳俊廷
author JUN-TING CHEN
陳俊廷
spellingShingle JUN-TING CHEN
陳俊廷
A Boundary-Mode Boost Power Factor Correction Control IC
author_sort JUN-TING CHEN
title A Boundary-Mode Boost Power Factor Correction Control IC
title_short A Boundary-Mode Boost Power Factor Correction Control IC
title_full A Boundary-Mode Boost Power Factor Correction Control IC
title_fullStr A Boundary-Mode Boost Power Factor Correction Control IC
title_full_unstemmed A Boundary-Mode Boost Power Factor Correction Control IC
title_sort boundary-mode boost power factor correction control ic
publishDate 2010
url http://ndltd.ncl.edu.tw/handle/90884151565225112837
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