| Summary: | 碩士 === 國立臺灣科技大學 === 電子工程系 === 98 === This thesis aims to realize a boundary-mode control IC for single-switch boost power factor correction (PFC) converters. To reduce the low-frequency harmonics of the source current and achieve high power factor, the duty cycle must be regulated according to the ratio of the instantaneous source voltage and the output voltage for each switching period. In this thesis, a novel PFC control scheme with variable duty cycle is proposed. The operation principles and design considerations are analyzed and discussed. Compared with the conventional DCM PFC control method with fixed switching frequency and constant duty cycle, the proposed variable duty cycle control method has many merits such as low harmonics, high power factor, good voltage regulation, high efficiency, and simple circuit. The TSMC 0.35μm 2P4M 3.3/5V CMOS process is adopted for the implementation of this chip. The simulation results under different environment and process variations are shown to verify the feasibility of the proposed scheme.
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