Implementation of a Robust and Low Cost ADC Code Hit Counting Technique

• Main Authors: Ming-Huan Lu, 呂明桓
• Other Authors: Jiun-Lang Huang
• Format: Others
• Language: zh-TW
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/38390395037393819827

碩士 === 國立臺灣大學 === 電機工程學研究所 === 98 === This thesis presents a robust, low-cost ADC code hit counting technique to record the number of times each ADC output code word appears with respect to the linear ramp input stimulus. Using a smart center code tracking engine together with the code tracking algorithm, the proposed code hit counter performs robustly against the code transition noise, missing code segments, and non-monotonicity. Furthermore, the required hardware and test time is at the same level as the known best results. The robust code hit counting technique has two versions: the basic and complete versions. The basic version aims to tolerate the code transition noise while the complete version also handles missing code segments and non-monotonicity. To verify the code hit counting technique, behavior simulations of both versions are performed in MATLAB. 1,000 randomly perturbed ADC output sequences are generated to validate the code hit counters. We then realize both code hit counters in Verilog HDL. After verifying that the Verilog simulation results are consistent with the behavior simulation results, we synthesize the complete code hit counter with TSMC 0.18um mixed signal (1P6M) CMOS process technology through the cell-based flow to realize a macro block that can be easily integrated into an ADC for self-testing or self-calibration applications.