| Summary: | 碩士 === 臺灣大學 === 電信工程學研究所 === 98 === The goal of this thesis is to design and implement four power amplifiers, two in pHEMT and two in CMOS processes, including two X-band high efficiency power amplifiers, a 24 GHz balanced amplifier, and a K-band power amplifier.
The first part of the thesis presents a harmonic tuned power amplifier at X-band. Adding harmonic loading circuits at the output and the input of the transistor can improve the overall output power and power added efficiency of the power amplifier. The circuit is designed in 0.15-μm low-noise pHEMT technology and has a measured maximum PAE of 48.5% at 10.5 GHz. An abrupt flush of the drain current is obtained in measuring this amplifier, and the measurement phenomenon and mechanism of the abrupt flush of the drain current due to reverse gate current are also investigated in this part.
The second part focuses on the design of high power amplifier at 24 GHz using 0.15-μm power pHEMT technology. Two 8 finger 800-μm devices are combined in a current method in the two-stage PA, and then using the balanced configuration combines two same two-stage PAs again. Considering the process variation of small capacitors in the circuit design, re-simulation results show good agreement with measurements. The re-design results indicate that the odd mode oscillation is illuminated and process variation only has less effect on the circuit.
The third part shows an X-band power amplifier with the high PAE and the small chip size using 0.18-μm CMOS process. In order to obtain wide bandwidth at power and PAE performance, broadband output and input matching network are adopted in this power amplifier. From the measurements, the power amplifier obtained the best PAE of 25.7% and saturation output power of 23.8dBm at 9.5 GHz. Besides, this PA demonstrates the 1-dB power bandwidth from 7.8 to 11 GHz and the PAE insides this bandwidth all exceed 20%. To our knowledge, this is a power amplifier with the highest PAE, the smallest chip size to date in CMOS process at X-band.
The final part presents a K-bnad high power amplifier with the wide power bandwidth implemented by 0.13-μm CMOS technology. Broadband output power matching and broadband input conjugate matching lead to good power and PAE performances at the designed band. This PA achieves a measurement saturation output power of 18.6 dBm at 24 GHz with a power bandwidth of 6.5 GHz, and the PAE all exceeds 10% at this bandwidth. To our knowledge, this is a power amplifier with the widest power bandwidth and high saturation output power to date in CMOS process at K-band.
Index Terms—power amplifier (PA), X-band, K-band, pHEMT, CMOS, monolithic microwave integrated circuit (MMIC), high efficiency, high power, reverse gate current, wide power bandwidth.
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