| Summary: | 碩士 === 臺灣大學 === 光電工程學研究所 === 98 === Thin films transistors has long been the workhorse in the active-matrix liquid crystal display (AM-LCD) industry. In the future development, the displays will expand to larger size and higher resolution. Due to the nature restriction of the mobility, amorphous silicon thin film transistors are incapable of driving next generation flat panel displays. Besides, organic light emitting diode displays have the advantages of high contrast ratio and wide view angle. It is likely to replace the traditional liquid crystal displays. But owing to the instability mechanism of a-Si TFTs, the working current will decrease after a prolong operating. This will cause the brightness of OLED displays degrade and being a challenge for commercialization.
ZnO has larger carrier mobility than amorphous silicon. The fabrication process of ZnO TFTs is compatible to traditional a-Si TFTs, which posses the ability of fabrication in large area with low cost. In this thesis, in order to improve the output current of ZnO TFTs, we proposed a new structure with a delta-doped channel layer. From theoretical model, this structure allows us to adjust the threshold voltage by varying the composition of the delta-doped layer. In the further experiment, we successfully fabricated the device with working current reaching 3.2mA under VGS=5Vand VDS=14V. This proves that this structure can provide a higher current than conventional ZnO and GZO TFTs.
In order to improve process reliability, we redesign the fabrication process. Plasma enhanced chemical vapor deposition (PECVD) can deposit uniform film in large area. This will contribute to maintain identical electrical performance for the devices with the same size. Furthermore, it restrains the leakage current. The unsaturated and over-shoot phenomena are not observed anymore. In order to improve the device stability, we deposited and annealed the ZnO film in various temperatures. The on-off ratio is increased to larger than 109. Since oxide semiconductor is sensitive to ambient configuration, we proposed a guide line for choosing passivation. The threshold voltage shift after depositing passivation is reduced to 1V.
At last, we compared three samples with various post ZnO growth annealing durations. We compared the stability through a constant gate bias stress. A stretch-exponential time dependence was introduced and was utilized to extracted the characteristic trapping time (τ). A further stress test under different temperature was carried out on the device with longest τ (1.26x106s). An average effective energy barrier (Eτ) was extracted (0.57eV). Comparing those parameter with literature, we successful fabricated ZnO TFTs with high stability.
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