以GeneralizedHebbianAlgorithm為基礎的主成分分析之硬體實現
碩士 === 國立臺灣師範大學 === 資訊工程研究所 === 98 === This paper presents a novel hardware architecture for fast principle component analysis (PCA). The architecture is based on generalized Hebbian algorithm (GHA). In the architecture, the updating of different synaptic weight vectors are divided into a number of...
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| Format: | Others |
| Language: | zh-TW |
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2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/29484029152421058187 |
| Summary: | 碩士 === 國立臺灣師範大學 === 資訊工程研究所 === 98 === This paper presents a novel hardware architecture for fast principle component analysis (PCA). The architecture is based on generalized Hebbian algorithm (GHA). In the architecture, the updating of different synaptic weight vectors are divided into a number of stages. The results of precedent stages will be used for the computation of subsequent stages for expediting training speed and lowering the area cost. The proposed architecture has been embedded in a system-on-programmable-chip (SOPC) platform for physical performance measurement. Experimental results show that the proposed architecture is an effective alternative for fast PCA attaining both high performance and low computational time.
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