The design and analysis of 80V DDDMOSFET
碩士 === 國立清華大學 === 電子工程研究所 === 98 === In this thesis, the design flow of DDDMOSFET in the 0.5um process is presented. In order to make the device suitable for highside circuits, N-type buried layer is added to the structure of DDDMOSFET. The efficiency for the different device structures is compared...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/59504615008058157911 |