| Summary: | 碩士 === 國立中山大學 === 資訊工程學系研究所 === 98 === In many multimedia applications, a little error in the output results is allowable. Therefore, this thesis presents an iterative floating-point multiplier with multiple precision to reduce the energy consumption of floating-point multiplication operations. The multiplier can provide the users with three kinds of modes. The distinction among the three modes is the accepted output error and the achievable energy saving through reducing the length of mantissa in the multiplication operation.
In addition, to reduce the area of multiple precision floating-point multiplier we use the iterative structure to implement the mantissa multiplier in a floating point multiplier. Moreover the C++ language is adopted to evaluate the product error between each mode and the IEEE754 single precision multiplier. When the multimedia applications request high precision, the multiple precision floating-point multiplier will iteratively execute the 4-2 compression tree three times and the product error is around 10e-5%. The second-mode with the middle accuracy will iteratively execute the 4-2 compression tree two times and the product error is around 10e-3%. The third mode with the lowest accuracy will execute the 4-2 compression tree once and the product error is around 1%, it requires less execution cycle number. When compared with the tree-stage IEEE754 single-precision multiplier, the proposed iterative floating-point multiplier can save 42.54% area. For IDCT application, it can save 37.78% energy under 1% error constraint, For YUV to RGB application, it can save 31.36% energy under 1.1% error constraint. The experimental results demonstrate that the proposed multiple precision iterative floating-point multiplier can
significantly reduce the energy consumption of multimedia applications that allow a little output distortion
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