Design of Ku-band Voltage-controlled Oscillator and Mixer in 0.18um Process Technology

• Main Authors: Yin-Yu Lin, 林映宇
• Other Authors: Ro-Min Weng
• Format: Others
• Language: zh-TW
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/52254716344521229417

碩士 === 國立東華大學 === 電機工程學系 === 98 === Due to the flourish development of the wireless communication network, the communication quality of satellite systems has improved greatly. VCOs and Mixers are basic sub-circuits in RF transceivers. They are also very important for deciding the performance of high frequency circuits. The satellite communication systems have many advantages such as no topographical constraints, small sizes, and easy installation. The circuit design in this thesis is focused on the application of the satellite communication systems within Ku band (12GHz~18GHz). VCOs and Mixers for Ku band satellite communications systems are therefore proposed. A 14GHz current-reuse low power VCO and Ku band low power mixer are presented. The research objectives are mainly on both eliminating the noise and saving the power consumption. In the thesis, Advanced Design System (ADS) as the simulation software was used. The circuit was fabricated using tsmc 0.18um 1P6M CMOS technology and taped out by National Chip Implementation Center (CIC). Two VCOs and one Mixer are presented. The first chip is a 19GHz current-reuse low power VCO. The phase noise is -121.5 at 1MHz offset frequency. The power consumption is 3.27mW with a 1.5V supply voltage. The central frequency is 19.46GHz, and output power is 0.9dBm. The second chip is a 14GHz current-reuse low power VCO. The phase noise is -112.7 at 1MHz offset frequency. The power consumption is 1.7mW with a 1.2V supply voltage. The central frequency is 14.14GHz, and output power is 2.4dBm. The third chip is a Ku-band low power mixer. The conversion gain is 5.4~9.2dB. The power consumption is 3.1mW with a 1.2V supply voltage. IIP3 is -4~1.1dBm at 12GHz to 18GHz. The design theorem, circuit simulation, and layout are provided. A complete description of design procedure is given in this thesis.