Design of Elastic Pipelines for Tolerating Timing Errors

碩士 === 國立東華大學 === 電子工程研究所 === 98 === With the rapid and sophisticated development of semiconductor manufacturing, designing chips has become increasingly challenging. Chip designers are now faced with much more complicated nanometer-based circuits with not only finer manufacturing process but also h...

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Bibliographic Details
Main Authors: Shao-Hsien Lin, 林紹賢
Other Authors: Hsin-Chou Chi
Format: Others
Language:zh-TW
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/58904495525831106190