VLSI Design Planning with Power Integrity and I/O Constraints
博士 === 國立中央大學 === 電機工程研究所 === 98 === In modern VLSI deigns, manufacturing issues have complicated the designs of chips as well as packages. Moreover, due to the requirement of the market, modern circuits have higher functionality, lower supply voltage and more I/Os. These conditions increase complex...
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| Format: | Others |
| Language: | en_US |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/96482607566485991855 |