| Summary: | 碩士 === 國立中央大學 === 電機工程研究所 === 98 === In the thesis, a new embedded forth multi-core microprocessor and its operation system, called WHDVIForth, are proposed. This multi-core microprocessor performs the procedures of the algorithm for joint source and channel coding. A kind of computation model, concurrent process, is implemented according to this system. WHDVIForth can be used to design joint source and channel coding algorithm. WHDVIForth also suits for embedded system since it is small and fast enough. Eventually, it is simulated and verified on TSMC 0.18um Cell-Based Design flow and it is running on 200 MHz with 8.65K gate count. On the other hand the system software is very compact, only about 5K bytes.
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