High linearity CMOS transconductors with triode-region pseudo-differential input pair

• Main Authors: Cheng, Shih-Tung, 鄭世東
• Other Authors: Hung, Chung-Chih
• Format: Others
• Language: zh-TW
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/57313678452286286431

碩士 === 國立交通大學 === 電機學院通訊與網路科技產業專班 === 98 === With the evolution of the fabrication technology, the supply voltage of the electric circuit systems has become lower and lower. Since portable electronic devices are getting very popular, it is the trend to lower power supply voltage in order to decrease power consumption. For digital circuits, when the power supply reduces, the power consumption would be lower while circuit performance stays the same. However, for analog circuits, the low voltage supply might not only bring the downgrade of circuit performance, but also cause failure of some basic circuit structures. It has attracted lots of attentions to design analog circuits to work under low voltage conditions. Two circuits have been proposed to improve the linearity of the transconductors working in the triode region. High transconductance tuning range, low voltage supply, and high linearity are all achieved in the design. The first circuit is designed by biasing input transistor pair in the triode region, in parallel with another input pair working in the weak inversion region, to cancel out the third order harmonic distortion. The power supply voltage is 1.2V and the circuit consumes 0.226mW. The third order harmonic distortion of -71.3dB is achieved with the input signal of 0.4Vpp. The transconductor fabricated by TSMC 0.18um CMOS 1P6M technology occupies the area of . The second transconductor also biases the input transistor pair in the triode region. In addition, high performance mobility compensation mechanism has been implemented. It has successfully suppressed the third order harmonic distortion by 22.4dB. The supply voltage is 1.8V and the circuit consumes 427uW. The third order harmonic distortion of -79dB is achieved with the input signal of 1.2Vpp. The transconductor fabricated by TSMC 0.18um CMOS technology occupies the area of .