Low-Noise Receiver/ Up- Converter Using V-NPN BJT/ Schottky Diode n Standard CMOS Process,

碩士 === 國立交通大學 === 電信工程研究所 === 98 === This thesis includes three parts. First, we realize a receiver by utilizing CMOS 0.18μm parasitic vertical BJTs in the mixer LO core to reduce flicker noise for the low-power Wireless PAN RF front-end. In the mean time, we implement a fully-integrated 60GHz up-co...

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Bibliographic Details
Main Authors:	Wang, Chia-Ling, 王嘉苓
Other Authors:	Meng, Chin-Chun
Format:	Others
Language:	zh-TW
Published:	2010
Online Access:	http://ndltd.ncl.edu.tw/handle/03492272205211674452

id	ndltd-TW-098NCTU5435096
record_format	oai_dc
spelling	ndltd-TW-098NCTU54350962016-04-18T04:21:48Z http://ndltd.ncl.edu.tw/handle/03492272205211674452 Low-Noise Receiver/ Up- Converter Using V-NPN BJT/ Schottky Diode n Standard CMOS Process, 標準CMOS製程下使用垂直NPN/蕭基二極體之低雜訊接收機和升頻器與pHEMT UWB接收機 Wang, Chia-Ling 王嘉苓碩士國立交通大學電信工程研究所 98 This thesis includes three parts. First, we realize a receiver by utilizing CMOS 0.18μm parasitic vertical BJTs in the mixer LO core to reduce flicker noise for the low-power Wireless PAN RF front-end. In the mean time, we implement a fully-integrated 60GHz up-converter in the low-cost on 0.18μm CMOS process to fit the need of high-data-rate down/up-load of video and audio. Finally, we demonstrate UWB low noise receivers by applying a novel quadrature generator with the wideband Marchand balun and bandwidth extension techniques. Meng, Chin-Chun 孟慶宗 2010 學位論文 ; thesis 158 zh-TW
collection	NDLTD
language	zh-TW
format	Others
sources	NDLTD
description	碩士 === 國立交通大學 === 電信工程研究所 === 98 === This thesis includes three parts. First, we realize a receiver by utilizing CMOS 0.18μm parasitic vertical BJTs in the mixer LO core to reduce flicker noise for the low-power Wireless PAN RF front-end. In the mean time, we implement a fully-integrated 60GHz up-converter in the low-cost on 0.18μm CMOS process to fit the need of high-data-rate down/up-load of video and audio. Finally, we demonstrate UWB low noise receivers by applying a novel quadrature generator with the wideband Marchand balun and bandwidth extension techniques.
author2	Meng, Chin-Chun
author_facet	Meng, Chin-Chun Wang, Chia-Ling 王嘉苓
author	Wang, Chia-Ling 王嘉苓
spellingShingle	Wang, Chia-Ling 王嘉苓 Low-Noise Receiver/ Up- Converter Using V-NPN BJT/ Schottky Diode n Standard CMOS Process,
author_sort	Wang, Chia-Ling
title	Low-Noise Receiver/ Up- Converter Using V-NPN BJT/ Schottky Diode n Standard CMOS Process,
title_short	Low-Noise Receiver/ Up- Converter Using V-NPN BJT/ Schottky Diode n Standard CMOS Process,
title_full	Low-Noise Receiver/ Up- Converter Using V-NPN BJT/ Schottky Diode n Standard CMOS Process,
title_fullStr	Low-Noise Receiver/ Up- Converter Using V-NPN BJT/ Schottky Diode n Standard CMOS Process,
title_full_unstemmed	Low-Noise Receiver/ Up- Converter Using V-NPN BJT/ Schottky Diode n Standard CMOS Process,
title_sort	low-noise receiver/ up- converter using v-npn bjt/ schottky diode n standard cmos process,
publishDate	2010
url	http://ndltd.ncl.edu.tw/handle/03492272205211674452
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Low-Noise Receiver/ Up- Converter Using V-NPN BJT/ Schottky Diode n Standard CMOS Process,

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