Fabrication and Electrical Characteristics of the Nanocrystal Nonvolatile Memory Devices

• Main Authors: Hu, Chih-Wei, 胡志瑋
• Other Authors: Tseng, Tseung-Yuen
• Format: Others
• Language: en_US
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/78411153682233647883

博士 === 國立交通大學 === 電子研究所 === 98 === In conventional memory devices, poly-silicon is used as the “floating-gate” to store charge. However, the conventional floating-gate non-volatile memory device has faced the challenge of reliability due to the requirement of down-scaling device. The scaled tunneling oxide is difficult to prevent the stored charge in the floating-gate from tunneling back into the Si-substrate. To improve the retention time of conventional floating-gate memories, nanocrystal memory devices have been proposed. In the nanocrystal structure, the device can store charge in distributed charge trapping centers. Even if the leakage path is formed in the tunneling oxide, the device still can keep enough charge for the correct data of logic circuit. In the thesis, the nanocrystal memory devices using Co and Ni as charge trapping center have been fabricated and studied due to the higher work-function, better gate coupling ability and lower fabricating temperature. In addition, the most common methods to form nanocrystal structures are by the self-assembled characteristic of thin film, aggregation by the over-saturation, and different oxidized tendency between elements. Many improvements of the aforementioned methods have been discussed and proposed. In the self-assembled system, a novel nanocrystal structure has been fabricated by annealing the Ge-incorporate NiSi (NiSiGe) film. After a RTA process, it is found that the annealed NiSiGe film shows a larger nanocrystal size (~8-9nm) and lower density distribution (3.02×1011cm-2) than the conventional NiSi nanocrystal. The large size and lower density of nanocrystal are due to the internal Ge elements that provide an easier crystallization and enhance the nanocrystal formation. Furthermore, the NiSiGe nanocrystal memory device shows a 9V of memory window under ± 10V operation in capacitance-voltage measurement due to the improved nanocrystal formation process. In the retention test, the NiSiGe nanocrystal memory device also has a 2.4V of memory window after 104 sec measurement. Ion implantation can control the nanocrystal aggregation sites and density by adjusting the energy and dosage of the implantation. However, the implantation method also brings a drawback of oxide damage. Therefore, a co-evaporation has been proposed to fabricate nickel nanocrystal structure. The co-evaporation to form Ni nanocrystal reveals double- and single-layer structures after 700 and 800℃ annealing process, respectively. The distributed nucleation sites provided by the co-evaporation bring a double layer distribution. The double layer nanocrystal device shows an 8V memory window due to a higher nanocrystal density. However, the 800℃-annealed device has an extra high density distribution (~4.5×1012cm-2) even if the device only has single layer structure. In the retention test, the 800 ℃-annealed sample also can keep a 2.3V memory window due to a improvement of dielectric layer surrounded the nanocrystal. Several literatures have studied the segregation of the nanocrystal by the difference of the oxidation free energy between the elements. A reactive sputtering has been used to fabricate the Co nanocrystal structure to avoid the over-oxidation of the charge-trapping layer. In the reactive sputtering process, the deposited CoSi2 thin film is oxygen-doped or partially oxidized. After a 700℃ RTA process, it can be found that Co nanocrystal were aggregated on the tunneling oxide obviously. The size and density of the nanocrystal are about 5-6nm and 3.2×1012cm-2, respectively. The nanocrystal memory device shows a 7V memory window under ± 15V operation. In the retention characteristic, the memory device also can keep a 3.1V memory after 104 sec measurement. Low-temperature oxide deposited technology is critical for the next generation NVM device. In this work, the combination of nanocrystal structure and nitric acid oxidation has been studied. The decomposition of HNO3 as powerful oxidizing agent can provide a high concentration of atomic oxygen to oxidize the immersed metal or semiconductor layer. It can be found that the CoSi2 nanocrystal memory device with nitric acid oxidized ZrO2 film as tunneling oxide shows a 10V memory window and 2.1V of memory window in the retention measurement. The nitric acid oxidation is advantageous to improve the thermal budget issue of the thermal oxide demand of the conventional nanocrystal memory devices because the higher fabrication temperature of the NVM devices is determined by the nanocrystal.