CMOS Cascode Class E Power Amplifier Design with Linearity Compensation

博士 === 國立交通大學 === 電子研究所 === 98 === The dissertation presents the design of the cascode Class E power amplifier with AM-AM and AM-PM compensation for polar applications. For integration and reliability analysis in CMOS process, the Class E designed with small dc-feed and using cascode topology has be...

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Main Authors: Tsou, Wen-An, 鄒文安
Other Authors: Wen, Kuei-Ann
Format: Others
Language:en_US
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/28131528547992525167
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spelling ndltd-TW-098NCTU54280962016-04-25T04:28:34Z http://ndltd.ncl.edu.tw/handle/28131528547992525167 CMOS Cascode Class E Power Amplifier Design with Linearity Compensation 具線性度補償之互補金氧半層疊E類功率放大器設計 Tsou, Wen-An 鄒文安 博士 國立交通大學 電子研究所 98 The dissertation presents the design of the cascode Class E power amplifier with AM-AM and AM-PM compensation for polar applications. For integration and reliability analysis in CMOS process, the Class E designed with small dc-feed and using cascode topology has been presented. When the Class E is in supply modulation, the AM-AM and AM-PM distortion is introduced at the RF output signal. This work not only analyzes the cause of the distortion but also presents a compensation technique. When modulating the gate bias voltage of the cascode transistor, the transistor operates as a resistance alike to improve the distortion of the amplifier. The experimental result of proposed 2.6 GHz cascode Class E power amplifier shows that when the PA is compensated the AM-PM is reduced from 30° to 6° and the output envelope voltage is linearly to supply voltage in VDD > 0.6 V. The experimental result of the 2.6 GHz cascode Class E power amplifier with self-biased control circuit shows that the voltage slope of AM-AM is 1 V/V and the phase error of AM-PM is 5°. The PA has a output power of 12 dBm, drain efficiency of 17.8% and PAE of 16.6% from a 1.8 V supply and an input driving of 6 dBm. Therefore, the experimental results demonstrate the proposed compensation technique can effectively improve the AM-AM and AM-PM distortion of the cascode Class E amplifiers. In addition, the simulation results of the RF/baseband co-verification platform with OFDM-based signal source show that the EVM is improved from -17 dB to -19.2 dB at 16QAM modulation and from -21 dB to -25.1 dB at 64QAM modulation. Finally, due to the low quality factor of silicon-based inductor causing the degradation on PA efficiency, the PA with multi-metal layer suspended inductors has been presented. The simulation result shows that the PA can have a maximum efficiency improvement of 17%. Wen, Kuei-Ann 溫瓌岸 2010 學位論文 ; thesis 92 en_US
collection NDLTD
language en_US
format Others
sources NDLTD
description 博士 === 國立交通大學 === 電子研究所 === 98 === The dissertation presents the design of the cascode Class E power amplifier with AM-AM and AM-PM compensation for polar applications. For integration and reliability analysis in CMOS process, the Class E designed with small dc-feed and using cascode topology has been presented. When the Class E is in supply modulation, the AM-AM and AM-PM distortion is introduced at the RF output signal. This work not only analyzes the cause of the distortion but also presents a compensation technique. When modulating the gate bias voltage of the cascode transistor, the transistor operates as a resistance alike to improve the distortion of the amplifier. The experimental result of proposed 2.6 GHz cascode Class E power amplifier shows that when the PA is compensated the AM-PM is reduced from 30° to 6° and the output envelope voltage is linearly to supply voltage in VDD > 0.6 V. The experimental result of the 2.6 GHz cascode Class E power amplifier with self-biased control circuit shows that the voltage slope of AM-AM is 1 V/V and the phase error of AM-PM is 5°. The PA has a output power of 12 dBm, drain efficiency of 17.8% and PAE of 16.6% from a 1.8 V supply and an input driving of 6 dBm. Therefore, the experimental results demonstrate the proposed compensation technique can effectively improve the AM-AM and AM-PM distortion of the cascode Class E amplifiers. In addition, the simulation results of the RF/baseband co-verification platform with OFDM-based signal source show that the EVM is improved from -17 dB to -19.2 dB at 16QAM modulation and from -21 dB to -25.1 dB at 64QAM modulation. Finally, due to the low quality factor of silicon-based inductor causing the degradation on PA efficiency, the PA with multi-metal layer suspended inductors has been presented. The simulation result shows that the PA can have a maximum efficiency improvement of 17%.
author2 Wen, Kuei-Ann
author_facet Wen, Kuei-Ann
Tsou, Wen-An
鄒文安
author Tsou, Wen-An
鄒文安
spellingShingle Tsou, Wen-An
鄒文安
CMOS Cascode Class E Power Amplifier Design with Linearity Compensation
author_sort Tsou, Wen-An
title CMOS Cascode Class E Power Amplifier Design with Linearity Compensation
title_short CMOS Cascode Class E Power Amplifier Design with Linearity Compensation
title_full CMOS Cascode Class E Power Amplifier Design with Linearity Compensation
title_fullStr CMOS Cascode Class E Power Amplifier Design with Linearity Compensation
title_full_unstemmed CMOS Cascode Class E Power Amplifier Design with Linearity Compensation
title_sort cmos cascode class e power amplifier design with linearity compensation
publishDate 2010
url http://ndltd.ncl.edu.tw/handle/28131528547992525167
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