Design and Implementation of Low-Power Fast Independent Component Analysis for Four Channels EEG Signal Separation
碩士 === 國立交通大學 === 資訊科學與工程研究所 === 98 === This thesis presents a low-power VLSI architecture for fast independent component analysis (FastICA) with the application to four-channel EEG signal separation. The proposed low-power schemes are as follows. 1) hybrid of fixed-point and floating-point number s...
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| Format: | Others |
| Language: | en_US |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/21951751663509942958 |