Design and Implementation of In-Process FOUP Exchange in Semiconductor Manufacturing
碩士 === 國立交通大學 === 資訊學院碩士在職專班資訊組 === 98 === Semiconductor manufacturing is an expensive investment. Depreciations of the equipments need years to cover while the growth of information technology accelerates year by year. Although the factories maximize the throughput and their capacity of manufactu...
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| Format: | Others |
| Language: | en_US |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/78503829199854580445 |
| Summary: | 碩士 === 國立交通大學 === 資訊學院碩士在職專班資訊組 === 98 === Semiconductor manufacturing is an expensive investment. Depreciations of the equipments need years to cover while the growth of information technology accelerates year by year. Although the factories maximize the throughput and their capacity of manufacturing these integrated circuits (IC), cycle time (CT) of producing these ICs has always been a key factor and reduction of CT is always welcome. On the other hand, a semiconductor factory may come up with more and more demands on manufacturing new products and these various combinations of products may affect the CT of a single volume product.
Front opening unified pod (FOUP) is the carrier of the 300mm wafers. During the process of manufacturing, the wafers are being exchanged from one FOUP to the other according to the information defined in a process flow. This thesis designs and implements a new strategy called In-Process FOUP Exchange (IPFE) via the concept of a new standard introduced in SEMI organization that would eventually assist to reduce the time of the wafers waiting to be executed by the FOUP exchange equipments and hence reduce the cycle time.
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