A Fast-Switching Frequency Synthesizer for UWB Mode-1 Applications

• Main Authors: Chia-WeiChang, 張家偉
• Other Authors: Tzuen-Hsi Huang
• Format: Others
• Language: en_US
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/26794486228752178828

碩士 === 國立成功大學 === 電機工程學系碩博士班 === 98 === The settling time for traditional fast-hopping frequency synthesizer is about several microseconds. It can’t conform to the UWB requirement. There are two types of frequency synthesizers for the UWB system at present. The first type is to use many PLLs and dividers to produce the center of frequency the band needed; the other is to use two or less PLLs with dividers, mixers and multiplexers to obtain all the center frequency of the bands. However, the method is not only complicated but also wastes plenty of area and power. In this study, therefore, we try to use a design scheme to simplify the circuit and realize a fast-switching frequency synthesizer. If the measurement results indicate this scheme practicable, it is expected to utilize such a scheme for the UWB system. We have proposed a method of jumping lock that could barely waste time between switching different bands by controlling the switching signal of VCO and divider appropriately. In the thesis, there is a method of jumping lock which enables the switching and locking time less than 10ns to fit for the UWB system. We design a PLL for UWB Mode-1 band by utilizing this technology. The VCO achieves the frequency switching among 3.432, 3.96 and 4.488GHz, and the phase noise are -120.1,-119.4 and -120.7dBc/Hz respectively. The charge pump current is about 150 with a variation of +-5%, and an acceptable Vctrl is designed between 0.5-1.3V. The simulation of PLL shows the locking time is less than 10ns which fits for the application of UWB system. The thesis can be divided into three parts. The first part is to introduce UWB technology background and application as well as our motivation. The second part is probed into the basics of PLL structure, including PFD, CP, LPF, VCO, prescaler and an integer type of frequency counter. After introducing the structure, the concepts of jumping lock technology and circuit design are shown. The third part is to discuss the difference between our simulation and measurement results, in the future. The challenges what we should pay attention to and improve in the future work is also been described.