Digitally Controlled Switching-Mode Step-Down DC-DC Converter for Adaptive Voltage Positioning Scheme

• Main Authors: Jing-YiHuang, 黃晉益
• Other Authors: Le-Ren Chang-Chien
• Format: Others
• Language: zh-TW
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/64772220762933142533

碩士 === 國立成功大學 === 電機工程學系碩博士班 === 98 === A digitally controlled Buck converter for adaptive voltage positioning (AVP) scheme is proposed in this thesis. With the AVP scheme, resistive output impedance can be realized to provide the optimal load transient response. To achieve the optimal load transient response, the control parameters should be adjusted with respect to the effective series resistance (ESR) of output capacitor. Generally, it is difficult to change the control parameters in the analog controller. Therefore, its optimal load transient response could not be guaranteed. Alternatively, it is easy to change the control parameters in the digital controller due to its programmability. In this work, a digitally controlled AVP scheme is adopted to achieve this goal. In this thesis, the principle of AVP scheme is explained first based on small-signal model analysis. The general guidelines of compensator design are illustrated. Following that, the guidelines of the digital controller design are also highlighted. A complete system model based on the design guidelines is constructed through Matlab/Simulink in this work. Model simulation shows that the results are correspondent with the theoretical analysis. Finally, a 12V-to-1.2V PCB-layout Buck embedded with the FPGA-realized digital controller is implemented to validate the performance of the AVP scheme.