Hardware Implementation of Entropy Encoder and Decoder for Video Compression Standards

• Main Authors: Yi-MingLin, 林宜民
• Other Authors: Pei-Yin Chen
• Format: Others
• Language: en_US
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/39884083951245216451

博士 === 國立成功大學 === 資訊工程學系碩博士班 === 98 === We present a low cost implementation technique for MPEG-4 variable length coding (VLC) in this dissertation. Two smaller tables are adopted in place of a large codeword table. Compared with other VLC techniques for MPEG-4 application, our design needs the least memory space. Synthesis results show that our VLC encoder and decoder both have the advantage of low cost. Moreover, we propose a novel method to merge MPEG-1/2/4 VLC tables and reduce the required storage space. Compared with other variable length decoders, the proposed design can outperform them with less hardware cost. In this dissertation, a context-based adaptive variable length coding (CAVLC) encoder and a context-based adaptive binary arithmetic coding (CABAC) encoder are both realized. We present an efficient technique for CAVLC encoder. Synthesis results demonstrate that the gate count of our design is less than previous CAVLC chips. Besides, a new design of context modeler for CABAC encoder is proposed. The well-organized location-index assignment and the copy-and-paste technique are employed to locate, store and retrieve the needed syntax elements both easily and efficiently with less storage space. The synthesis results show that the proposed CABAC encoder outperforms others with less hardware cost. The VLSI architectures of the proposed design were implemented by using Verilog HDL. We used SYNOPSYS Design Vision to synthesize the designs with TSMC or UMC cell library. Synthesis results demonstrate that our designs have the advantages of low cost and high performance.