An Incremental Checkpoint and Merge Scheme in MMU-less Dual-Mote Sensor Environments
碩士 === 國立中興大學 === 資訊網路多媒體研究所 === 98 ===
Main Authors: | Yen-Ting Liu, 劉彥廷 |
---|---|
Other Authors: | 張軒彬 |
Format: | Others |
Language: | zh-TW |
Published: |
2010
|
Online Access: | http://ndltd.ncl.edu.tw/handle/39851164354704038888 |
Similar Items
-
A Hardware Fault Detection Scheme for MMU-less Embedded Processors in Wireless Sensor Networks
by: Tsung-Yu Yeh, et al.
Published: (2009) -
A Design and Implementation of Checkpoint/Restart Scheme in Dual-Mote Systems for Wireless Sensor Networks
by: Yu-Han Li, et al. -
MMU Cache System and Thread Block Scheduling Enhancement for Virtual Memory Support on GPGPU
by: Wang, Yen-Kai, et al.
Published: (2014) -
Two-level incremental checkpoint recovery scheme for reducing system total overheads.
by: Huixian Li, et al.
Published: (2014-01-01) -
The readiness of MMU lecturers towards the implementation of blended learning
by: Hawa Rahmat, et al.
Published: (2019)