| Summary: | 碩士 === 龍華科技大學 === 電機工程研究所 === 98 === In recent years, the CMOS process technology has rapid developed. It has low- cost, high integration, and high maturity advantages, and making it has good performance in the high-frequency circuit applications. This thesis is focused on CMOS mixer design. Mixer is an important block to bring WiMAX’s excellent performance by high linearity receiver in the WiMAX receiver system, and then the quality of a receiver system entire linearity is usually dominated by mixer. However, the designer have to consider carefully that how to design a high linearity mixer to meet the receiver specification.
There are two proposed mixer designs which used basic folded mixer with improved structure presented in this thesis. The first one is the low voltage high linearity folded mixer. An RF cross-couple PMOS is used to improve 9.6 dBm of IIP3 and the supply voltage is only 1 V and the power dissipation is 4.3 mW.
The second design is a multiple-gate folded mixer. Fallowing the first design, the RF PMOS with low voltage structure is used. And the low KD PMOS is used as switch stage. A multiple-gate input stage is used to increase the transconductance. By the interactive of multiple-gate and the source degenerate resistor, the current through cross couple RF PMOS is limited to improve linearity and conversion gain simultaneously. The conversion gain is 6.88 dB, IIP3 is 2.62 dBm, DSB NF is 8.5 dB, and the band- width is 900 MHz.
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