A 4.15mW Low-Power High-Gain Current-Reuse Low Noise Amplifier Design Working in 5.2GHz Band

• Main Authors: Han-Jiun Hou, 侯鈞瀚
• Other Authors: 何彥仕
• Format: Others
• Language: zh-TW
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/60798995005364215973

碩士 === 國立高雄應用科技大學 === 電機工程系 === 98 === A current-reuse low noise amplifier using standard 0.18μm RFCMOS technology is proposed in this paper. The low noise amplifier is applicable on IEEE 802.11a 5.2 GHz at 0.8 V supply. The core circuit of the low noise amplifier has been designed based on current-reuse architecture and uses a source follower method for output impedance to 50Ω. Firstly, this thesis briefly introduces the fundamental theory of different kinds of low noise amplifier circuit. Secondly, we focus on low power consumption as the starting point to compared and benchmark several kinds of circuitries to achieve the low supply voltage technology of low noise amplifier circuit. The fundamental design guide line of low noise amplifier circuit is analyzed in this paper. Thirdly, the design procedures and optimization schemes of low noise amplifier circuit are presented. In order to achieve both the high gain and low voltage operation, the proposed low noise amplifier circuit uses a low Vt mos and an source follower. Agilent Advanced Design System (ADS) RF simulator and TSMC 0.18μm device model are adopted to prevail the low noise amplifier integrated circuit design. Low supply voltage and low power consumption are considered for low noise amplifier circuit as the key performance indexes in order to optimize and fine-tune low noise amplifier circuit. The low noise amplifier design is fabricated by using TSMC 0.18μm standard CMOS process via National Chip Implement Center (CIC) foundry chip service. The gain of this low noise amplifier achieves as high as 21.7 dB at 5.2 GHz under the supply voltage of 0.8 V. The low noise amplifier exhibits a noise figure of 2.8 dB and the isolation is greater than 47 dB. The DC power consumption of this low noise amplifier is only 5.2 mW. The chip area is 0.99 × 0.76 mm2. The figure of merit (FoM) of this low noise amplifier reaches 2.8 dB.