| Summary: | 碩士 === 國立高雄應用科技大學 === 電機工程系 === 98 === A down-conversion double-balanced Gilbert-cell mixer using standard 0.18μm RFCMOS technology is proposed in this paper. The mixer is applicable on IEEE 802.11a 5.2 GHz at 1.2 V supply. The core of the mixer has been designed based on Gilbert cell architecture and uses a LC Filter method for increasing the isolation between the LO and RF ports. Firstly, this thesis briefly introduces the fundamental theory of different kinds of mixer circuit. Secondly, we focus on low power consumption as the starting point to compared and benchmark several kinds of circuitries to achieve the low supply voltage technology of mixer circuit. The fundamental physics of mixer circuit is analyzed in detail in this paper. Thirdly, the design procedures and optimization schemes of mixer circuit are presented.
In order to achieve both the high LO-RF isolation and low voltage operation, the proposed mixer circuit uses a low Vt mos and an LC Filter between the LO and RF ports. Agilent Advanced Design System (ADS) RF simulator and TSMC 0.18μm device model are adopted to prevail the mixer integrated circuit design. According to the designed mixer circuit, low supply voltage and the low power consumption are considered for mixer circuit as the key performance indexes in order to optimize and fine-tune mixer circuit. The mixer design is fabricated by using TSMC 0.18μm standard CMOS process via National Chip Implement Center (CIC) foundry chip service.
The mixer achieves a voltage conversion gain of 6.7 dB at 5.2 GHz under the supply voltage of 1.2 V. The mixer exhibits a single-sideband noise figure of 9.3 dB and the RF-LO isolation is greater than 65 dB. The DC power consumption of this mixer is 2.6 mW at an IF frequency of 100 MHz. The chip area is 0.82 × 0.87 mm2. The figure of merit (FoM) of this low power mixer reaches as high as 15.7 dB.
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