| Summary: | 碩士 === 逢甲大學 === 產業研發碩士班 === 98 === With the advance of modern technology, functions of all kinds of electronics are continuously upgraded. The design trend is for lighter, thinner, shorter and smaller product. However, to achieve multi-functions, portable size, and high performance in limited space can cause safety concern for user. Electromagnetic interferences (EMI) in various forms have become an important environmental issue.
In the past, electromagnetic compatibility (EMC) solutions have relied heavily on the experience of engineer designing the system. In addition, for the lack of simulation software, the root problems can not be found in time. This means that the EMI problem can only be addressed at the final stage of certification test of the finished electronic products. This procedure required repeated test and retest process and will result in an increase in cost production and a prolonged time schedule for a viable product.
In this thesis, the main focus is on study of the simulation and verification using the Electrical Interconnect & Packaging (EIP) with the CST software to suppress cross-talk and adapt the best way to resolve the interference problems. Through the time-domain far-field analysis and measurement, the effects of EMI under different layout design applications are examined.
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